1. Field of the Invention
The present invention relates to an electrically rewritable nonvolatile semiconductor storage device and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, an LSI is formed by integrating elements in a two-dimensional plane on a silicon substrate. To increase storage capacity of a memory, the dimensions of each element have to be decreased (miniaturized). In recent years, however, it is becoming difficult to realize the miniaturization from the viewpoint of cost and techniques. For miniaturization, the technique of photolithography has to be improved. For example, in the present ArF immersion exposure technique, the rule around 40 nm is the resolution limit. For further miniaturization, it is necessary to introduce an EUV exposure device. However, the cost of an EUV exposure device is high and it is unrealistic to introduce the EUV exposure device when the cost is considered. Even if miniaturization is achieved, as long as the drive voltage is not scaled, it is expected that breakdown voltage or the like in elements reaches a physical limit point. That is, there is the high possibility that operation of the device becomes difficult.
In recent years, a number of semiconductor storage devices in which memory cells are disposed three-dimensionally in order to increase integration degree of a memory are proposed (refer to Japanese Patent Application Laid-Open No. 2007-266143 and U.S. Pat. Nos. 5,599,724 and 5,707,885).
One of conventional semiconductor storage devices in which memory cells are disposed three-dimensionally is a semiconductor storage device using a transistor having a cylindrical structure. In a semiconductor storage device using a transistor having a cylindrical structure, stacked conductive layers serving as a gate electrode obtained by stacking a number of layers and a pillar-shaped columnar semiconductor are provided. The columnar semiconductor functions as a channel (body) part of a transistor. A memory gate insulating layer capable of storing charges is provided around the columnar semiconductor. The configuration including the stacked conductive layer, the columnar semiconductor, and the memory gate insulating layer is called a memory string.
In a semiconductor storage device having the memory string, a plug conductive layer extending from the surface of a semiconductor storage device and reaching each of stacked conductive layers is formed. A voltage is applied to the stacked conductive layers via the plug conductive layer. In the conventional technique, however, wiring resistance of the stacked conductive layers is larger than a predetermined value, and adverse influence is exerted on the operation stability of a semiconductor storage device.